Imperial College London Researcher Finds Bugs in FPGA Design Tools

John P. Wickerson, a researcher at Imperial College London, has identified bugs in FPGA place-and-route tools using automated fuzzing techniques [1, 2].

These findings are significant because automated hardware design tools are foundational to modern electronics. If the tools used to map logic onto hardware contain errors, it can lead to unpredictable behavior in the final physical chips, potentially compromising the reliability of critical infrastructure.

Wickerson's research focused on the place-and-route process, which is the stage where a logical design is translated into a physical layout on a Field Programmable Gate Array (FPGA) [1, 2]. By applying fuzzing—a method of providing randomized, unexpected inputs to a system to trigger crashes or errors—the team was able to uncover flaws in how these tools handle specific design configurations [1, 3].

The project aimed to demonstrate that these automated tools are not infallible [1, 2]. The research highlights a gap in how hardware design software is traditionally tested, suggesting that systematic, automated testing is necessary to ensure the integrity of the hardware being produced [1, 2].

Imperial College London served as the hub for this investigation [1, 2]. The team utilized these techniques to show that bugs in the software layer of hardware design can manifest as physical failures, or logic errors, in the resulting hardware [1, 3].

Wickerson said the goal of the work was to improve the overall reliability of these tools through more rigorous testing methodologies [1, 2]. This approach allows developers to find and fix bugs before the tools are used in large-scale commercial, or industrial, production [1, 3].