NEO Semiconductor demonstrated a proof-of-concept for its 3D X-DRAM technology on April 23, 2026 [1].
The breakthrough addresses the soaring demand for memory driven by artificial intelligence workloads. By utilizing existing 3D NAND manufacturing infrastructure, the company aims to enable high-density DRAM that overcomes the physical scaling limits of traditional memory [2].
Based in San Jose, California, NEO Semiconductor developed a true three-dimensional DRAM cell architecture [3]. This design is intended to provide up to 10 times the capacity of current DRAM [4]. The company said its memory can reach up to 512 Gb per module [4].
While standard flash memory currently uses more than 200 stacking layers [5], the industry has set future goals to reach 1,000 layers [5]. NEO Semiconductor intends to leverage these vertical scaling capabilities to move beyond the constraints of two-dimensional layouts.
Industry perspectives on the maturity of this technology vary. Some reports describe 3D DRAM as being in the early stages of development [6]. However, NEO Semiconductor said its proof-of-concept validation is complete, indicating that the 3D X-DRAM is functional [1].
The company has also secured strategic investment to further advance the development of this AI-focused memory [3]. This funding is intended to transition the technology from a validated proof-of-concept toward commercial viability.
“NEO Semiconductor aims for 10 times the capacity of today’s DRAM.”
The shift toward 3D DRAM represents a fundamental change in how memory is manufactured. By moving from a planar to a vertical architecture, the industry can increase density without requiring smaller, more unstable transistors. If NEO Semiconductor successfully scales this proof-of-concept, it could remove a primary bottleneck in AI hardware, allowing larger models to run on fewer physical modules.


