Silicon Motion Technology Corporation announced the SM2524XT, a new six nm [3] DRAMless [4] SSD controller designed for mainstream storage devices.

This hardware launch targets the growing AI PC market by integrating specific optimizations to handle the high-speed data requirements of local artificial intelligence workloads. By reducing KV cache latency, the controller aims to improve the efficiency of large language models running on consumer hardware.

The SM2524XT is built on a six nm [3] manufacturing process, allowing for higher efficiency in a DRAMless [4] architecture. This design removes the need for a dedicated DRAM chip on the SSD, which typically lowers the overall cost of the drive while maintaining high performance. According to company specifications, the controller can achieve read speeds of up to 14 GB/s [1].

In addition to sequential read speeds, the chip supports random IOPS of up to 2.5 million [2]. These figures represent a push to bring enterprise-level performance to mainstream consumer SSDs. The focus on AI-PC optimization is intended to ensure that storage bottlenecks do not hinder the responsiveness of AI-driven applications.

Silicon Motion said the goal of the SM2524XT is to provide high-performance, AI-optimized storage to a broader range of users. The integration of these features allows mainstream drives to better support the data-heavy nature of modern computing, specifically the rapid retrieval of data needed for AI inference.

The controller can achieve read speeds of up to 14 GB/s.

The shift toward DRAMless controllers that can maintain 14 GB/s speeds suggests a narrowing gap between budget-friendly storage and high-end enthusiast drives. By specifically targeting KV cache latency, Silicon Motion is acknowledging that AI workloads create different storage bottlenecks than traditional gaming or productivity tasks, signaling a transition where SSD hardware is tuned for neural network efficiency rather than just raw throughput.